SOC Design/Verification
Cutting
Edge technology Custom SOC development
At Intelop, we believe that the goal of any good design flow must be first-time
working silicon. Therefore, our engineers invest significant effort in refining
methodology, processes, flows and IP to achieve first-pass success. Intelop
engineers will consult with your teams to determine the most optimal strategy
for rapid realization of your designs, with significant productivity gains,
while simultaneously reducing the chances of errors.
The team at Intelop has developed and taped
out more that 30 SOCs and complex ASICs. Some of them integrated more than 24
different IP blocks and multiple processors, more than 5 million gates running
at 500 MHz in 90 nm technology library.
- System level modeling, Planning and Specification development
- IP integration
- Micro-architecture and design specification
- RTL Design and Verification
- Property checking, model checking and assertions
- System and RTL co-simulation
- Synthesis and STA
- Gate level Verification
- Front and Back end Design For Test (DFT ) Services
- Floor Planning, Power planning, Place & Route, and Timing Closure
- Formal Verification and Equivalency Checking
- Physical verification and tape out.
Testimonial
“Chip Express needed to broaden their services and products offerings for our customers, Intelop’s experience in structured ASICs and system design helped us fulfill that gap for our customer projects. Our customers enjoyed value add in some critical areas of the ASIC development project"- Gus Armani. Director, Engineering Services
Testimonial
"In highly competitive markets, it is critical to provide our customers with feature-rich solutions that keep pace with industry demand, the performance of the Intelops’ IP cores and experience in SOC designs enabled us to rapidly design and deliver a range of advanced SoCs for interactive broadband."- D Wetman GM, Networking, Ikanos
Proven IP Cores for SOC Designs